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[ 源代码: covered  ]

软件包: covered (0.7.10-3build1)

covered 的相关链接

covered

Trisquel 的资源:

下载源码包 covered:

维护者:

Original Maintainers:

  • Debian Electronics Team (Mail Archive)
  • أحمد المحمودي (Ahmed El-Mahmoudy)

外部的资源:

  • 主页 [covered.sourceforge.net]

相似软件包:

Verilog code coverage analysis tool

Covered is a Verilog code coverage utility that reads in a Verilog design and a generated VCD/LXT dumpfile from that design and generates a coverage file that can be merged with other coverage files or used to create a coverage report. Covered also contains the GUI coverage report utility that reads in a coverage file to allow interactive coverage discovery. Areas of coverage measured by Covered are: line, toggle, memory, combinational logic, FSM state/state-transition and assertion coverage.

其他与 covered 有关的软件包

  • 依赖
  • 推荐
  • 建议
  • dep: libc6 (>= 2.11)
    GNU C Library: Shared libraries
    同时作为一个虚包由这些包填实: libc6-udeb
  • dep: libtcl8.6 (>= 8.6.0)
    Tcl (the Tool Command Language) v8.6 - run-time library files
  • dep: libtk8.6 (>= 8.6.0)
    Tk toolkit for Tcl and X11 v8.6 - run-time files
  • dep: tklib
    standard Tk Library
  • dep: zlib1g (>= 1:1.1.4)
    compression library - runtime
  • rec: iverilog
    Icarus verilog compiler
    或者 verilog
    Icarus verilog compiler (transitional package)
    或者 gplcver (>= 2.12a-1.1)
    Verilog simulator

下载 covered

下载可用于所有硬件架构的
硬件架构 软件包大小 安装后大小 文件
i386 533.6 kB2506 kB [文件列表]