[ Source: verilator ]
Пакунок: verilator (3.916-1build1)
Links for verilator
Trisquel Resources:
Download Source Package verilator:
Maintainer:
Original Maintainers:
- Debian Electronics Team (Mail Archive)
- أحمد المحمودي (Ahmed El-Mahmoudy)
External Resources:
- Homepage [www.veripool.org]
Similar packages:
fast free Verilog simulator
Verilator is the fastest free Verilog HDL simulator, and beats many commercial simulators. It compiles synthesizable Verilog (not test-bench code!), plus some PSL, SystemVerilog and Synthesis assertions into C++ or SystemC code. It is designed for large projects where fast simulation performance is of primary concern, and is especially well suited to generate executable models of CPUs for embedded software design teams.
Інші пакунки пов'язані з verilator
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- dep: libc6 (>= 2.14) [amd64]
- GNU C Library: Shared libraries
also a virtual package provided by libc6-udeb
- dep: libc6 (>= 2.4) [i386]
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- dep: libgcc1 (>= 1:3.0) [amd64]
- GCC support library
- dep: libgcc1 (>= 1:4.2) [i386]
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- dep: libstdc++6 (>= 5.2)
- GNU Standard C++ Library v3
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- sug: gtkwave
- VCD (Value Change Dump) file waveform viewer
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- sug: systemc
- Пакунок недоступний
Завантажити verilator
| Архітектура | Розмір пакунка | Розмір після встановлення | Файли |
|---|---|---|---|
| amd64 | 2,811.0 kB | 12811 kB | [список файлів] |
| i386 | 2,902.7 kB | 11385 kB | [список файлів] |