[ Bron: arachne-pnr ]
Pakket: arachne-pnr (0.1+20160813git52e69ed-1)
Verwijzigingen voor arachne-pnr
Trisquel bronnen:
Het bronpakket arachne-pnr downloaden:
- [arachne-pnr_0.1+20160813git52e69ed-1.dsc]
- [arachne-pnr_0.1+20160813git52e69ed.orig.tar.gz]
- [arachne-pnr_0.1+20160813git52e69ed-1.debian.tar.xz]
Beheerder:
Original Maintainers:
- Debian Science Maintainers (Mailarchief)
- Ruben Undheim
Externe bronnen:
- Homepage [github.com]
Vergelijkbare pakketten:
Place and route tool for iCE40 family FPGAs
Arachne-pnr implements the place and route step of the hardware compilation process for FPGAs. It accepts as input a technology-mapped netlist in BLIF format, as output by the Yosys synthesis suite for example. It currently targets the Lattice Semiconductor iCE40 family of FPGAs. Its output is a textual bitstream representation for assembly by the IceStorm icepack command. The output of icepack is a binary bitstream which can be uploaded to a hardware device.
Together, Yosys, arachne-pnr and IceStorm provide an fully open-source Verilog-to-bistream tool chain for iCE40 1K and 8K FPGA development.
Andere aan arachne-pnr gerelateerde pakketten
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- dep: arachne-pnr-chipdb
- Chip db files for arachne-pnr
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- dep: fpga-icestorm
- Tools to handle the bitstream format of Lattice iCE40 FPGAs
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- dep: libc6 (>= 2.14)
- GNU C Library: Shared libraries
Ook een virtueel pakket geboden door: libc6-udeb
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- dep: libgcc1 (>= 1:3.0)
- GCC support library
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- dep: libstdc++6 (>= 5.2)
- GNU Standard C++ Library v3
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- dep: yosys
- Framework for Verilog RTL synthesis